Silicon Sensor Technology Developments: APDs and Strip sensors with charge multiplication

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1 Silicon Sensor Technology Developments: APDs and Strip sensors with charge multiplication P. Fernández-Martínez, G. Pellegrini, S. Hidalgo, M. Lozano (IMB-CNM-CSIC)

2 IMB-CNM-CSIC new research line on silicon detectors with CHARGE MULTIPLICATION and PROPORTIONAL response Proportional Response Multiplication Absorbed Energy Information Better signal/noise ratio and High Sensibility IMB-CNM Clean Room Fabrication FLEXIBLE Technology

Multiplication Absorbed Energy Information Better signal/noise

3 Basic Activity Lines Photon Detection Particle Detection PIN Diode Proportional Response Good efficiency Good spectral range Strip Detectors TID damage Post-irradiation Lower quality signal Multiplication Multiplication APD linear mode Proportional Response Good efficiency Good spectral range Strip Detectors with multiplication control Pre & Post irradiation same signal Thin Strip Detectors Integration with Better Sensibility the same signal Better signal/noise ratio

linear mode Proportional Response Good efficiency Good spectral range Strip Detectors with multiplication control Pre

4 Linear Mode APDs Reachthroug-APD 1000 nm Infrared HEP Aplication 650 nm Near Infrared Reverse RT-APD 300 nm Visible VUV A few KeV ~ 30 KeV Soft X-ray Medium X-ray X Ray Direct Detection Reachthroug-APD

5 Reach-Through Avalanche Photodiodes (RT-APD) High electric field values at the junction enhanced avalanche multiplication Signal proportional to the absorbed energy Edge termination structures ensure the gain stability and uniformity High resistivity substrate (~ 15 kω cm, 1.3E12 cm -3 ) Reverse Biased Depletion region reaches the P + anode diffusion through the active region P + /P - (π)/p/n + diode structure

the gain stability and uniformity High resistivity substrate (~ 15 kω cm, 1.

6 Device Optimisation: Edge termination structures Cylindrical Junction 50% breakdown reduction 80% electric field increase at the junction edge N + and P layers laterally diffuse Electric Field (V/cm) constituting a cylindrical junction Edge termination structures should be implemented to ensure gain stability and uniformity Edge termination techniques reduce the parasitic effects induced by the charge and defects at the passivation layers and interfaces.

junction Edge termination structures should be implemented to ensure gain stability and uniformity Edge

7 Device Optimisation: Edge termination structures Overlap and Guard Ring structures should be placed at optimized distance to avoid cylindrical breakdown and undesired electric field peaks at the multiplication junction edge. Positive fixed charges at the Si/SiO 2 interface induce a shallow N-type inversion layer that short-circuits the edge termination structures and accelerates the substrate lateral depletion. P-type shallow diffusions as P-spray or P-stop should be included to ensure the edge termination structures effectiveness.

Positive fixed charges at the Si/SiO 2 interface induce a shallow N-type inversion layer that short-circuits the edge termination

8 Cathode Current (A/ m) VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 Device Optimisation: Breakdown & Dark Current By an iterative process, the doping profiles and edge termination characteristics are adjusted to optimize the electrical performances Simulated IV for different P-layer implant doses. Imp P layer (cm -2 ) 1.0e13 1.6e13 1.2e13 1.8e13 1.4e13 2.0e13 1.5e13 Simulated Electric Field distribution at 800 V Interface Charge = 5e10 cm Applied Voltage (V) High resistivity substrate (~ 15 kω cm, 1.3E12 cm -3 )

profiles and edge termination characteristics are adjusted to optimize the electrical performances 10-8 10-9 Simulated IV for different P-layer

9 Device Optimisation: Gain fitting N + and P layer diffusion profiles determine the electric field distribution at the multiplication region In order to fit the expected gain, multiplication region diffusions should be adjusted. Effective charge at the P-layer determines the multiplication factor A TCAD Sentaurus simulation methodology has been devised in order to fit the final gain of the device.

10 Device Optimisation: Gain fitting Gain Simulation Procedure Post illuminated device: Region with higher virtual impact ionization rate to emulate the electron hole generation due to X-ray absorption Post and Pre illuminated behavior are compared.

ionization rate to emulate the electron hole generation due

11 Gain Breakdown Voltage (kv) VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de D Simulated Gain and Breakdown voltage with respect to the Boron implant dose V 400 V 500 V ,0x ,0x ,5x10 13 Player Implant Dose (cm -2 ) 0 Main technological parameters Wafer thickness: 300 µm Substrate doping concentration: 1.3E12 cm -3 P layer implant dose: 1.2E13 cm -2 N+ layer doping concentration: 1e19 cm -3

Boron implant dose 50 4 40 30 20 10 Gain @ 200 V Gain @ 400 V Gain @ 500 V 3 2 1 0 5,0x10 12 1,0x10 13 1,5x10 13 Player

12 First technological processes (2 runs) Different sizes and layouts Square (10 10 mm 2, 5 5 mm 2, 1 1 mm 2 & 0,3 0,3 mm 2 ) Device Fabrication Devices fabricated at the IMB-CNM Clean Room Rectangular (10 5 mm 2, 10 1 mm 2, 5 3 mm 2 & 5 1 mm 2 ) Different edge termination structures Overlap (20 μm, 50 μm & 100 μm ) Guard ring ( at 10 μm, 20 μm & 30 μm) Different doping profiles to adjust the P- layer effective charge Gain fitting Single Phosphorus implant for a Gaussian N + layer Double Phosphorus implant for a step N + layer Different Boron implants for the P-layer Wafers with p-spray to avoid the inversion layer and P-stop at the edge to reduce the peripheral leakage current A new technological process will be defined with the improvements derived from simulation and experimental results.

layer effective charge Gain fitting Single Phosphorus implant for a Gaussian N + layer Double Phosphorus implant for a step N + layer Different Boron implants for the P-layer Wafers with p-spray to

13 Cathode Current (na) Cathode Current (na) VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 On-wafer electric characterisation (Dice size = 5 x 5 mm) First Characterisation Results PIN diode (with P-spray) APD diode (without P-spray) Dark current ~ 25 na Dark current ~ 25 na Vbr ~ 550 V d5 d9 d6 d Reverse Bias Voltage (V) d7 d12 d10 Vbr ~ 950 V Reverse Bias Voltage (V) High and stable breakdown voltage ( 800 V) Good dark current levels (20-40 operation voltage range ( V) Relatively good processing yield within the wafer

(with P-spray) APD diode (without P-spray) 1000 1000 Dark current ~ 25 na Dark current ~ 25 na 100 100 10 10 Vbr ~ 550 V d5 d9 d6 d12 1 0 150 300 450 600

14 Cathode Current (na) Cathode Current (na) VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 First Characterisation Results On-wafer electric characterisation APD diode (3 x 5 mm) APD diode (5 x 5 mm) Dark current ~ 25 na 100 Dark current ~ 10 na d7 d11 d9 d12 Vbr ~ 950 V d Reverse Bias Voltage (V) 10 d7 d12 d10 Vbr ~ 950 V Reverse Bias Voltage (V)

characterisation APD diode (3 x 5 mm) APD diode (5 x 5 mm) 1000 1000 Dark current ~ 25 na 100 Dark current ~ 10

15 COUNTS VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 First Characterisation Results Detection characterisation Packaged devices have been tested with a 241 Am source (60 KeV Gamma) PIN (50 V) APD10 (50 V) PIN (300 V) APD10 (300 V) Good spectrum identification High noise levels Low gain (M 400 V) Channel

Detection characterisation Packaged devices have been tested with a 241 Am source (60 KeV Gamma)

16 COUNTS Gain VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 First Characterisation Results APD10 (50 V) APD10 (100 V) APD10 (200 V) APD10 (300 V) APD10 (400 V) 3,0 2,5 2, , Channel 1, Applied Voltage (V)

Characterisation Results 3000 2000 APD10 (50 V) APD10 (100 V) APD10 (200 V)

17 First Characterisation Results HAMAMATSU S % de Vbr =400 V 50 % de Vbr =950 V

18 First Characterisation Results HAMAMATSU S8550

19 Strip Sensors a. Irradiated devices suffer displacement damage that change their charge collection dynamics Defects induced by radiation increase the electric field at the junction of the N + diffusion The electric field increase leads to a multiplication of the collected charge in irradiated devices b. Project: fabricate a p-type strip detector with small gain Similar signal before and after irradiation Multiplication occurs at low bias voltage Gain should be limited between 2 and 10: - Avoid Crosstalk - Avoid exceeding the dynamic range of readout electronics Capacitance should not increase - Higher capacitance Higher noise

junction of the N + diffusion The electric field increase leads to a multiplication of the collected charge in irradiated devices b.

20 Technological proposals I. Trench filled with doped polysilicon along the centre of the strip pitch A N + contact is created into the silicon bulk that modifies the electric field in the collection region multiplication 80µm Poly trench n+ 5µm 5µm 8µm p-stop 285µm 32µm 20µm p- p+

pitch A N + contact is created into the silicon bulk that modifies

21 Technological proposals II. P-type diffusion along the centre of the strip pitch Under reverse bias conditions, a high electric field region is created at the N + P junction multiplication 80µm P-type diffusion n+ 285µm 5µm 32µm 8µm 20µm p-stop p- p+

22 Strip Detector Simulation of the Electric Field Poly Trench P diffusion High Electric Field region driven deep in the bulk High Electric Field peak at the centre of the strip

23 Electric Field (V/cm) Electric Field (V/cm) VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 High Electric Field peak at the junction Simulation of the Electric Field 10 5 Strip Center Achieved Electric Field values are comparable with the irradiated devices Strip Poly Trench P Diffusion Strip Detector: Strip Center High Electric Field region driven deep in the bulk Depth ( m) 10 3 No Irradiated eq = 1 x n/cm Depth ( m)

24 Simulation of charge collection: MIP Strip Detector Poly Trench P Diffusion A/cm 2 We are developing a simulation procedure to obtain the gain value

Status of the Work: Fabrication The fabrication run includes: Conventional Strip Detectors Poly Trench structures with different trench depths: 5 µm 10 µm 50 µm Structures with small P

25 Status of the Work: Fabrication The fabrication run includes: Conventional Strip Detectors Poly Trench structures with different trench depths: 5 µm 10 µm 50 µm Structures with small P layer along the center of the strip Devices with large P layer along the center of the strip Oxide filled trench structures with a P layer implanted through the trench: 5 µm 10 µm 50 µm

26 MPV electrons VI Jornadas Part. Española Futuros Aceleradores Granada de Mayo de 2011 Now measuring in Liverpool (G. Casse) In the framework of CERN RD50 Preliminary results: Strip Diodes CNM-5510-W3/16-MPV Nominal charge = 265 µm x 80 e =21,200 e CNM-5510-W3-10umTrench_MPV CNM-5510-W3-10umTrench_MPV_maxCurrent CNM-5510-W16-P+_MPV_Det#5 CNM-5510-W16-P+_MPV_Det#14 Micron-APC-freshpixel Bias V

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