DCIS2010. XXV Conference on Design of Circuits and Integrated Systems

Gran Hotel Meliá Salinas Costa Teguise Lanzarote, Canary Islands SPAIN November 17-19, 2010 www.dcis.org DCIS2010 XXV Conference on Design of Circuits and Integrated Systems

This year, the XXV Conference on Design of Circuits and Integrated Systems (DCIS) will be celebrated in the idyllic island of Lanzarote, shaped by its volcanic scenario and by the architectural monuments designed by the well known artist César Manrique. Big efforts have been made in order to create the perfect atmosphere to meet with your colleagues and to discuss the last advances on a variety technologies related to modelling, design, implementation and test of circuits and systems. This environment will be accompanied by attractive technical contibutions sent by researchers in the field, wishing to create new sinergies among the scientific community. The main program is composed by 121 regular presentations structured in 32 sessions running in four paralled tracks at any time. Aditionally, everyday a keynote presentation will be conducted by outstanding personalities from the academic and industry arena. We welcome you to enjoy the best of spanish hospitality as well as participating in a most stimulating scientific conference. José F. López, General Chair WELCOME

General Chair Steering Committee José F. López, U. Las Palmas de GC - IUMA Past General Chair Armando Roy, U. Zaragoza Technical Program Co-chairs Roberto Sarmiento, U. Las Palmas de GC - IUMA Isidro Urriza, U. Zaragoza Local Committee Valentín de Armas, U. Las Palmas de GC - IUMA Sebastián López, U. Las Palmas de GC - IUMA Gustavo Marrero, U. Las Palmas de GC - IUMA Félix Tobajas, U. Las Palmas de GC - IUMA International Liasons Daniela de Venuto, Politecnico di Bari Linda Milor, Georgia Institute of Technology Bernd Straube, Fraunhofer Institute Marcelo Lubaszewski, U. Fed. Rio Grande Do Sui Alkis A. Hatzopoulos, Aristotle U. of Thessaloniki Salvador Bracho, U. Cantabria Joan Figueras, U. Politécnica Cataluña Leopoldo García-Franquelo, U. Sevilla Eugenio Garcia, U. IIIes Baleares José Luis Huertas, CNM Sevilla Juan Carlos López, U. Castilla La Mancha Antonio Núñez, U. Las Palmas Gran Canaria Emilio Olías, U. Carlos III Michel Renovell, lirmm Pascal Fouillat, ENSEIRB Armando Roy, U. Zaragoza Antonio Rubio, U. Politécnica Cataluña Adoración Rueda, CNM Sevilla Josep Samitier, U. Barcelona José A Silva Matos, U. Porto Antonio J. Torralba, U. Sevilla Javier Uceda, U. Politécnica Madrid J. Paulo Teixeira, Inst. Superior Técnico Teresa Riesgo, U. Politécnica Madrid Carlos López-Barrio, U. Politécnica Madrid Ángel Rodríguez-Vázquez, CNM-IMSE Marisa López, U. Politécnica Madrid Committees

Acosta Antonio J. U. of Seville IMSE CNM (CSIC) Aguiar Rui L. U. de Aveiro Alarcon Eduard U. Politecnica Catalunya Albuquerque Edgar INESC-ID Alexandres Fernandez Sadot U. Pontificia Comillas Almeida Carlos IST-UTL/INESC-ID Alorda Bartomeu U. Illes Balears Alves José Carlos U. do Porto Arapoyanni Angela U. Athens Avedillo Maria J. IMSE-CNM Azcondo Francisco U. Cantabria Azemard Nadine U. Montpellier Badets Franck STMicroelectronics Balado Luz U. Politecnica Catalunya Barriga Ángel IMSE-CNM-CSIC Baturone Iluminada U. of Seville IMSE CNM (CSIC) Bausells Joan IMB-CNM Beilleau Nicolas UFRN Bota Sebastià UIB Bracho Salvador U. of Cantabria Canas Ferreira João U. of Porto Carlos Pedro Jose IEEE Carmona-Galán Ricardo IMSE-CNM Castro-López Rafael U. of Seville and IMSE/CNM Celma Santiago U. de Zaragoza Chillet Daniel U. of Rennes / IRISA Costa Freire Joao IT-Lisboa de Armas Valentín U. Las Palmas de GC - IUMA de Castro Ángel U. Autonoma Madrid de la Rosa José M. U. de Sevilla and IMSE/CNM Reviewers

de la Torre Eduardo CEI U. Politécnica de Madrid de Venuto Daniela DEE-Politecnico Bari Delgado Manuel IMSE-CNM Di Natale Giorgio LIRMM Dieguez Angel U. Barcelona Dualibe Carlos U. Católica Córdoba Fernández Jorge Instituto Superior Técnico Fernández Herman Unexpo Ferreiros Javier DIE- U. Politécnica de Madrid Ferrer Carles IMB-CNM(CSIC) Fesquet Laurent IMAG-Grenoble Figueras Joan U. Politecnica Catalunya Flottes Marie-Lise LIRMM CNRS/UM2 Fouillat Pascal ENSEIRB García-Moreno Eugenio U. of the Balearic Islands Garrido Matías J. U. Politecnica de Madrid-SEC Gericota Manuel ISEP-IPP-Porto Gilles Sicard TIMA Laboratory - UJF Hatzopoulos Alkis U. of Thessaloniki, Greece Herms Atilà U. Barcelona Isabel Teixeira Isabel INESC-ID Isern Eugeni U. of the Balearic Islands Izpura José-Ignacio U. Politécnica de Madrid Jiménez Fernández Carlos Jesús IMSE-CNM Joao Rosario Maria IX-IT-Lisboa Juárez Eduardo U. Politécnica de Madrid-SEC Klein Jacques-Olivier U. Paris Sud Legat Jean DICE-UCL Leger Gildas IMSE-CNM-CSIC Leveugle Regis TIMA Reviewers

Linares Bernabe IMSE-CNM López José F. U. Las Palmas de GC - IUMA López Sebastián U. Las Palmas de GC - IUMA López Juan Carlos U. of Castilla-La Mancha López Barrio Carlos A. U. Politécnica de Madrid López-Ongil Celia Carlos III University of Madrid López-Vallejo Marisa U. Politécnica de Madrid Louerat Marie-Minerve Lab Informat.Paris 6 Lubaszewski Marcelo U. Fed. Do Rio Grande do Sul Machado da Silva José U. Porto Madrenas Jordi U. Politecnica Catalunya Manich Salvador U. Politecnica Catalunya Marrero Callicó Gustavo Iván U. Las Palmas de GC - IUMA Martín José Luis U. of the Basque Country Martínez Mar U. of Cantabria Martin-Gonthier Philippe ISAE CIMI Martins Miguel INESC-ID Martins Ferreira Jose M. U. Porto Matos José U. Porto Medeiro Fernando IMSE-CNM Medrano Nicolás U. of Zaragoza Mengibar Luis U. Carlos III Miquel Roca U. of the Balearic Islands Mir Salvador TIMA Laboratory Miribel Pere U. de Barcelona Montiel-Nelson Juan A. U. Las Palmas de GC - IUMA Moreno Mauricio U. Barcelona Moreno Félix U. Politécnica de Madrid Moreno Juan Manuel U. U.Politecnica Catalunya Moya Francisco U. of Castilla-La Mancha Reviewers

Murphy Roberto INAOE Navarro Denis U. Zaragoza Naviner Jean-Francois Telecom ParisTech Neto Horacio INESC-ID/IST/UTL Nouvel Fabienne IETR Nunez Antonio U. Las Palmas de GC - IUMA Oliver i Malagelada Joan U. Autónoma de Barcelona Otin Arantxa U. Zaragoza Pascal Joris InESS Paulo Teixeira Joao INESC-ID Perez-Verdu Belen IMSE-CNM Pescador Fernando U. Politécnica de Madrid Petrashin Pablo U. Católica de Córdoba Picos Rodrigo U. of the Balearic Islands Pissaloux Edwige ROBOT.JUSSIEU Prinetto Paolo Politec.Torino Psychalinos Costas U. of Patras Puig-Vidal Manel U. of Barcelona Ramdani Mohamed ESEO Renovell Michel LIRMM-U. Montpellier Ribas Lluis Dep. EE. Un. Aut Ribeiro Alves Gustavo ISEP-IPP-Porto Riesgo Teresa CEI U. Politécnica de Madrid Rius Vazquez Josep U. Politecnica Catalunya Rodríguez Andina Juan J. U. de Vigo Rodríguez Vazquez Ángel IMSE-CNM Rodríguez-Montañés Rosa UPC Rouzeyre Bruno Jesus LIRMM-U.Montpellier Roy Armando U.Zaragoza Rubio Antonio U. Politecnica Catalunya Reviewers

Samitier Josep Dep. Electrónica-Univ. Barcelona Sánchez Pablo University of Cantabria Sánchez-Elez Marcos Univ. Complutense Sánchez-Solano Santiago IMSE-CNM Sandoval Francisco DTE-Univ. Málaga Santos Henrique U.MINHO Santos Dinis Universidade deaveiro Sarmento Helena INESC-ID/IST/UTL Sarmiento Rodríguez Roberto IUMA-ULPGC Sarrabayrouse Gerard LAAS-CNRS Tolouse Segura Jaume UIB Sentieys Olivier IRISA - University of Rennes Serra-Graells Francesc IMB-CNM(CSIC) Serrano Gotarredona Teresa IMSE-CNM Sieiro Javier Dep. Electrónica-Univ. Barcelona Silva Medeiros Manuel INESC-ID Sinclair David Dublin City University Sklyarov Valery IEETA Soares Augusto José Universidade de Lisboa Sousa Leonel INESC-ID/IST, TU Lisbon Stechele Walter Ing-Univ. Carlos III Tatinian William U.Nice Terés Lluís IMB-CNM(CSIC) Tobajas Guerrero Félix B. IUMA-ULPGC Tsiatouhas Yiorgos University of Loannina Urriza Isidro U. Zaragoza Vachoux Alain EPFL Vaz Joao IST-U.T.Lisboa Vázquez Diego U. de Sevilla, IMSE-CNM Velazco Raoul IMAG-Grenoble Reviewers

Véstias Mário INESC-ID/ISEL/IPL Vidal Fernando U. de Málaga Villar Eugenio U. of Cantabria Vladimir Ogurtsov Vladimir Tyndall National Institute Yufera Alberto IMSE-CNM Reviewers

08.15-09.00 Registration 09.00-09.20 Welcome and Opening Remarks 09.20-09.30 Break 09.30-10.30 Keynote Presentation Adjusting our Expectations for Agile Hardware, Peter Athanas, Virginia Tech (USA) 10.30-10.40 Break 10.40-12.00 Analog & Mixed Signal IC Design I Modeling, Simulation & Synthesis Techniques I 12.00-12.30 Coffee Break 12.30-13.50 Reconfigurable Computing Industrial Applications 14.00-15.30 Lunch 15.30-16.50 Analog & Mixed Signal Test Digital Signal Processing II 16.50-17.10 Coffee Break 17.10-18.30 Data Acquisition Systems Digital IC Design Digital Signal Processing I Embedded Design & SoC I Default & Fault Tolerant Techniques System Design Methodologies 19.00-20.00 Welcome Cocktail RF IC Design I Power Electronics Communication Systems I RF IC Design II Wednesday, November 17

Welcome and Opening Remarks 09.00 to 09.20 Keynote Presentation: Adjusting our Expectations to Agile Hardware, Peter Athanas, Virginia Tech (USA) Session W1A. Analog & Mixed Signal IC Design I Room: Tagoror Chairs: Eugenio García, José Luis Ausín 09.30 to 10.30 10.40 to 12.00 A 2nd Order Tunable Bandpass Sigma Delta Converter for Material Monitoring in Ball Bearings Muhammad Ali, Matthias Voelker Mixed Signal Slow Control in thedata Handling Processor for Belle-II Albert Comerma, Lluis Freixes, Eva Vilella, Tomasz Hemperek, Andre Kruth, Hans Krueger, Angel Dieguez A Very Linear Low-Pass Filter with automatic frequency tuning Manuel Pedro, Trinidad Sanchez-Rodriguez, Juan-Antonio Gomez-Galan, Fernando Muñoz, Ramon G. Carvajal, Antonio Lopez-Martin A Single Supply Analog Phase Sensitive Detection Amplifier for Embedded Applications Miguel Gabal, Nicolás Medrano, Belen Calvo, Santiago Celma, Pedro A. Martinez, Cristina Azcona Session W1B. Modelling, Simulation & Synthesis Techniques I Room: Teguise Chairs: Celia López-Ongil, Javier del Pino 10.40 to 12.00 Load-independent characterization of trade-off fronts for operational amplifiers Elisenda Roca, Manuel Velasco-Jiménez, Rafael Castro-López, Francisco V. Fernández A Pareto-based Systematic Design Technique for Reconfigurable Analog Circuits Using an Evolutionary Optimization Algorithm Manuel Velasco-Jiménez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández A Comparison of Substrate Coupling Noise Between Heavily and Lightly Doped Processes With a Grounded Backplane Contact Yiorgos Bontzios, Alkis Hatzopoulos Photoresponse model for photodiode-based CMOS APS in 180nm and 90nm technologies Beatriz Blanco-Filgueira, Paula López-Martínez, Diego Cabello Ferrer, Johann Hauer, Harald Neubauer Wednesday, November 17

Session W1C. Digital Signal Processing I Room: Presidente Chairs: Gustavo M. Callicó, Eduardo Juárez Reduced Complexity ICI Cancellation Scheme for OFDM DVB-SH receivers Ana Cinta Oria, Patricio López, Jose García, Darío Pérez-calderón, Vicente Baena, David Ortiz Improving Animal Tracking Algorithms with Adaptive Search Windows and Kalman Filters Hugo Trindade, Guiomar Evans, Paulo Fonseca, José Soares Augusto On the Hardware Implementation of Triangle Traversal Algorithms for Graphics Processing Pablo Royer, Pablo Ituero, Marisa López-Vallejo, Carlos A. López Barrio Real-Time Voxel-Based Visual Hull Reconstruction Jesus Perez, Pablo Sanchez Session W1D. RF IC Design I Room: Bridge Chairs: Pascal Fouillat, José M. de la Rosa A Current Conveyor Based Mixer for an UltraWide Band Receiver R. Díaz, Guillermo García Saavedra, Jonathan Arias Pérez, Sunil L. Khemchandani, J. del Pino 1.2V, 1.96mW @ 2.4GHz CMOS-90nm Switched-Transconductor Mixer Alberto Villegas, Diego Vázquez, Adoración Rueda Design of Injection-Locked Frequency Divider in 65 nm CMOS Technology for mm-w applications Davide Brandano, Jose Luis Gonzalez Continuously-Tuned Nanometer CMOS LNAs Edwin C. Becerra-Alvarez, Jose M. de la Rosa, Federico Sandoval-Ibarra Session W2A. Reconfigurable Computing Room: Tagoror Chairs: Juan Carlos López, Peter Athanas Run-time Generation of Partial FPGA Configurations for Subword Operations Miguel Silva, João Canas Ferreira The SORU2 Reconfigurable Coprocessor and Its Applications for Embedded Systems Security Jose M. Moya, Zorana Bankovic, Alvaro Araujo, Juan-Mariano de Goyeneche, Marina Zapater, Pedro Malagon, David Fraga, Juan Carlos Vallejo, Elena Romero, Javier Blesa, Daniel Villanueva, Octavio Nieto-Taladriz, Carlos A. López Barrio Platform Exploration for System On Chip Fabienne Nouvel, Yaset Oliva, J-C. Prevotet Feasibility of HW genetic algorithms for profile selection in reconfigurable autonomous embedded systems Andrés Otero, Remy Pujó, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo 10.40 to 12.00 10.40 to 12.00 12.30 to 13.50 Wednesday, November 17

Session W2B. Industrial Applications Room: Teguise Chairs: Antonio López, Armando Roy A low-cost and low-power WPAN Health Monitoring System, based on 802.15.4 David Daza, Evaristo Aranda, Carlos Rubia, Ramon G. Carvajal Design of an Analogue Receiver for the communication with Eurobalises Jaizki Mendizabal, Iñigo Adin, Jon del Portillo, Iñaki Sancho, Juan Meléndez, Guillermo Bistué Water Desalination with Energy Recovery Control System Jorge G. Norniella, Ivan C. Orille, Juan A. Martinez-Esteban, Fernando Nuño, Juan Martin-Ramos, Alberto M. Pernía Life Cycle of an Analogue Transmitter for a Safety-Critical System Jon del Portillo, Iñigo Adin, Jaizki Mendizabal, Raúl Antón, Juan Meléndez, Guillermo Bistué Session W2C. Embedded Design & SoC I Room: Presidente Chairs: Eduardo de la Torre, Félix Tobajas An Embedded Echo Cancellation Approach to DVB-T Gap-Fillers Jorge Paredes, Andoni Irizar, Jesús María San José Optimising Hardware Implementation of Montgomery Modular Multiplication Algorithm for Cryptographic Applications Anna Vaskova, Celia Lopez-Ongil, Alejandro Jimenez-Horas, Enrique San Millán Heredia Implementation of a DSP based DVB-H gateway Pedro J. Lobo, Fernando Pescador, Ernesto Seisdedos, David Samper, César Sanz An Improved Face Detection Algorithm For Software Implementation Said Belkouch, Mounir Bahtat, Noureddine Chabini Session W2D. Power Electronics Room: Bridge Chairs: José Silva Matos, Pere Miribel 12.30 to 13.50 12.30 to 13.50 12.30 to 13.50 Design and implementation in a DSP of a digital double loop voltage/current for a power inverter in an aircraft application Alexandre-Benoit Duret, Félix Moreno, Oscar García Suárez, Pedro Alou Cervera, Jesus Angel Oliver, Jose Antonio Cobos, David Meneses Analysis of the maximum power point tracking in the photovoltaic grid inverters of 100 kw V. Salas, P.J. Débora, E. Olías, A. Barrado Designing a Two Slope Gate Driver to Limit Internal Voltage Spikes in a Buck Converter José Rocha, M. Santos, J. Costa Monitoring Electrolytic Capacitors Online in Buck Converters Juan Martin-Ramos, Gustavo M. Buiatti, Juan A. Martinez-Esteban, Fernando Nuño, Alberto M. Pernía Wednesday, November 17

Session W3A. Analog & Mixed Signal Test Room: Tagoror Chairs: Eugeni Isern, Michel Renovell Fault Evaluation of a Distributed Preamplifying Stage of a High-Speed Folded ADC Yolanda Lechuga, Roman Mozuelos, Mar Martinez, Salvador Bracho Identification of Component Deviations in Analog Circuits Using Digital Signatures Alvaro Gomez-Pau, Ricard Sanahuja, Luz Balado, Joan Figueras A Test Platform for the Characterization of Mixed-Signal Power Cores Tiago Moita, Carlos Almeida, Marcelino Santos Support Vector Machine Methods Application for Analog & Mixed-Signal Circuit Fault Detection Alexios Spyronasios, Michael Dimopoulos, Dimitris Papakostas, Alkis Hatzopoulos Session W3B. Digital Signal Processing II Room: Teguise Chairs: Emilio Olías, Sebastián López 15.30 to 16.50 15.30 to 16.50 Using Physical Unclonable Functions for Hardware Authentication: A Survey Susana Eiroa, Iluminada Baturone, Antonio J. Acosta Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modeling, validation and profiling of the algorithm Rubén Salvador, Lukas Sekanina, Félix Moreno, Teresa Riesgo Image Quality Assessment for Resolution Enhancement Techniques in Medical Applications Lara G. Villanueva, Gustavo M. Callicó, Félix B. Tobajas Guerrero, Sebastián López, Valentín de Armas, José F. López, Roberto Sarmiento Rodríguez Closed Contours Objects Detection Algorithm (CCODA) Karlos Tarajano, Luis A. Monterde Session W3C. Default & Fault Tolerant Techniques Room: Presidente Chairs: Joan Figueras, Juan Meléndez Fault-Tolerant Nanoscale Architecture based on Linear Threshold Gates with Redundancy Nivard Aymerich, Antonio Rubio A FPGA based platform for Autonomous Fault Tolerant Systems Armando Astarloa, Unai Bidarte, Jesus Lázaro, Jaime Jiménez, Aitzol Zuloaga Enhanced Observability in Microprocessor-based Systems for Permanent and Transient Fault Resilience Margarita Gallardo-Campos, Marta Portela-Garcia, Mario Garcia-Valderas, Celia Lopez-Ongil, Luis Entrena, Michelangelo Grosso, Matteo Sonza Reorda 15.30 to 16.50 Wednesday, November 17

Session W3D. Communication Systems I Room: Bridge Chairs: José Luis Ayala, Félix Tobajas A low-cost gigabit solution for short reach optical communications Francisco Aznar, Santiago Celma, Belen Calvo A Low-power Programmable Gain Amplifier with Optimized Input Range in 90nm CMOS Process Antonio Ginés, Ricardo Doldán, Eduardo Peralías, Adoración Rueda A 3.125-GHz Voltage Controlled Ring Oscillator for Use in Clock and Data Recovery Applications Carlos Sanchez-Azqueta, Santiago Celma, Concepción Aldea, Francisco Aznar A parallel De-Interleaver implementation for Multiband Full-Rate Ultra-Wideband Receivers Bruno Jesus Fernandes, Helena Sarmento Session W4A. Data Acquisition Systems Room: Tagoror Chairs: Jorge Juan Chico, Jorge Portilla Design and Modeling of a 0.4mW/Ch Multi-Channel Integrated Circuit for Infrared Gas Recognition Stepan Sutula, Carles Ferrer, Francisco Serra-Grael Readout Circuitry for Raw Sensors Monitoring Systems Raúl Aragonés Ortiz, Paula liliana Álvarez, Joan Oliver i Malagelada, Carles Ferrer i Ramis A fa-range Low-Power Multi-Channel Digital ROIC for Differential Mobility Analyzers Aymen Jemni, Francisco Serra-Graells, Lluís Terés A 1-MHz 65-dB Limiting/Logarithmic Amplifier for Wideband Bioimpedance Measuring Devices Javier Ramos, José Luis Ausín, Guido Torelli, Juan Francisco Duque-Carrillo Session W4B. Digital IC Design Room: Teguise Chairs: Antonio Rubio, Marisa López Vallejo Diminished-One Modulo 2^n+1 Multiply-Add Circuits Dimitris Bakalis, Haridimos Vergos Area-Time Efficient Multi-Moduli Adder Design Haridimos Vergos, Dimitris Bakalis High reliability FIR filter on FPGAs for data acquisition Jesus Lázaro, Armando Astarloa, Aitzol Zuloaga, Jaime Jiménez, José Luis Martín 15.30 to 16.50 17.10 to 18.30 17.10 to 18.30 Wednesday, November 17

Session W4C. System Design Methodologies Room: Presidente Chairs: Jaizki Mendizábal, Félix Moreno A case study on Technology Transfer from University to Enterprises for System-on-Chip Design Innovation Unai Bidarte, Aitzol Zuloaga, Jaime Jiménez, Jesus Lázaro, Armando Astarloa Crypto-Core Design Using Functional Programming Techniques Tobias Häberlein, Matthias Brettschneider 3D Thermal-Aware Flooplanner using a MILP Approximation David Cuesta Gomez, Jose Luis Risco Martin, Jose Luis Ayala Rodrigo Long-term on-chip verification of systems with logical events scattered in time Julian Viejo, Jose Ignacio Villar, Jorge Juan, Alejandro Millan, Enrique Ostua, Juan Quiros Session W4D. RF IC Design II Room: Bridge Chairs: José M. López Villegas, Roc Berenguer RF CMOS MEMS oscillator with enhanced phase noise capabilities Arantxa Uranga, jaume verd, Joan Giner, Eloi Marigó, Jose Luís Muñoz, Núria Barniol Implementation of secure lightweight PRNGS for RFID Honorio Martín González, Pedro Peris López, Enrique San Millán Heredia, Luis Alfonso Entrena Arrontes Design of a Wideband Class-A Power Amplifier for Wireline Communication Cédric Dufis, Jose Luis Gonzalez 17.10 to 18.30 17.10 to 18.30 Wednesday, November 17

08.30-09.00 Registration 09.00-10.20 Analog & Mixed Signal IC Design II Embedded Design & SoC II 10.20-10.50 Coffee Break 10.50-12.20 Communication Systems II Executive Track Microtechnology vision: a business perspective Antonio Núñez (moderator), IUMA / U. Las Palmas de GC 12.20-12-30 Break 12.30-13.50 Analog & Mixed Signal IC Desing III RF IC Design III 14.00-15.30 Lunch Low Power Digital Design 16.00-24.00 Social Event & Gala Dinner Modeling, Simulation & Synthesis Techniques II Failure Analysis & Reliability Thursday, November 18

Session T1A. Analog & Mixed Signal IC Design II Room: Tagoror Chairs: Adoración Rueda, Salvador Bracho A High Drive CMOS Operational Amplifier for Wide Range of Capacitive Loads Enara Ortega García, Gustavo Alexis Pérez Ruiz, Sunil L. Khemchandani, Fernando Muñoz, J. del Pino 1.2-V fully differential second-order OTA-C lowpass filter in CMOS technology Juan M. Carrillo, Guido Torelli, Juan Francisco Duque-Carrillo A New Family of CMOS Charge Amplifiers Antonio Lopez-Martin, Alfonso Carlosena A New CMOS Switch Linearization Technique For Multi-Site Measurement Applications Sara Catalão, Tiago Costa, Moisés Piedade, Jorge Fernandes Session T1B. Embedded Design & SoC II Room: Teguise Chairs: Félix Moreno, Eduardo Juárez OS services for Reconfigurable System-on-Chip Communication Ludovic Devaux, Sebastien Pillement, Daniel Chillet, Didier Demigny Analysis and Implementation of Raptor Codes on Embedded System Todor Mladenov, Saeid Nooshabadi, Kskim Kim, Juan A. Montiel-Nelson Object-Based Communication Architecture for System-on-Chip Design Jesús Barba, Fernando Rincón, Francisco Moya, Juan Carlos López, Julio Dondo Performance Analysis of Arteris NoC Solution for Multiprocessor System-on-Chip José Antonio Mori, Félix B. Tobajas Guerrero, Valentín de Armas, Roberto Sarmiento Rodríguez Session T1C. Communication Systems II Room: Presidente Chairs: Antonio Hernández, Jorge Portilla Voltage Control Oscillator using Stacked Topology with Reduced Phase Noise Marcus Vinicius Alves Pereira, Adriano S. Cardoso, Nobuo Oki Impact of algorithms over the PER of a WLAN 802.11a based transceiver Aritz Alonso, Andoni Irizar, Ainhoa Cortés, Igone Vélez Implementing High-Speed Viterbi Decoders for MB-OFDM on FPGA Mário Véstias, Helena Sarmento OFDM Communication System for PLC: Equalization Approaches Pedro Silva, Jose Gerald 09.00 to 10.20 09.00 to 10.20 09.00 to 10.20 Thursday, November 18

Session T1D. Modeling, Simulation & Synthesis Techniques II Room: Bridge Chairs: Teresa Riesgo, Pablo Sánchez Session T2A. Analog & Mixed Signal IC Design III Room: Tagoror Chairs: Antonio Torralba, José Luis Ausín A Complex Filter Continuous Time SD Modulator for low-if Bluetooth Receivers Mariano Jimenez, Enrique Lopez-Morillo, Fernando Muñoz, Fernando Marquez, R.G Carvajal Accurate Low voltage Current Mode Analog WTA and Rank Order Circuits Jaime Ramirez-Angulo, Radhika Maryada, Antonio Lopez-Martin, Ramon G. Carvajal Two-Stage Class AB QFG CMOS Buffers Antonio Lopez-Martin, Jose M. Algueta, Lucia Acosta, Jaime Ramirez-Angulo, Ramon G. Carvajal Design of a CMOS Type-2 Fuzzy Membership Function Circuit Paloma Rizol, Leonardo Mesquita, Osamu Saotome 09.00 to 10.20 DLLs' behavioral modeling for power consumption and jitter fast optimization Enrique Barajas, Diego Mateo, Jose Luis Gonzalez System Simulation Platform for the Design of the SORU Reconfigurable Coprocessor Marina Zapater, Pedro Malagon, Zorana Bankovic, Jose M. Moya, Juan-Mariano de Goyeneche, Alvaro Araujo, David Fraga, Juan Carlos Vallejo, Elena Romero, Javier Blesa, Daniel Villanueva, Octavio Nieto-Taladriz, Carlos A. López Barrio Advanced modeling of Cylindrical Surrounding Gate Transistors for circuit simulation A.M. Roldán. Juan B. Roldán, F. Gámiz, F. Jiménez Molinos Analytical Delay Temperature Modeling for CMOS Inverters based on Dynamic Threshold Voltage Modeling Carol de Benito, Jaume Segura, Sebastià Bota, Josep L. Rosselló Executive Track: Microtechnology vision: a business perspective, Antonio Núñez (moderator), IUMA / U. of Las Palmas de Gran Canaria 10.50 to 12.20 12.30 to 13.50 Thursday, November 18

Session T2B. RF IC Design III Room: Teguise Chairs: José Machado da Silva, Javier del Pino A Noise Cancelling Multi-standard LNA for mobile digital TV applications A. Juanicorena, U Alvarado, Mariano Jimenez, H. García-Vázquez, Guillermo Bistué, Juan Meléndez Optimization and macromodeling of single-ended sub-nh MCPW based inductors for a 77GHz LNA in 65nm CMOS Roc Berenguer, Gui Liu, Yang Xu A Fully Integrated RF Front-End for DVB-SH H. García-Vázquez, D. Ramos-Valido, A. Juanicorena, C. Luján-Martínez, Sunil L. Khemchandani, J. del Pino Session T2C. Low Power Digital Design Room: Presidente Chairs: Juan A. Montiel, Luis Parrilla Simple Low Voltage, Low Power Implementations of Circuits for VT Extraction Jaime Ramirez-Angulo, Venkata Sailaja Kasaraneni, Antonio Lopez-Martin, Ramon G. Carvajal A 12-b Fully Integrated Voltage-to-Frequency Converter for Low-Power Sensor Interfaces Cristina Azcona, Belen Calvo, Nicolás Medrano, Alberto Bayo, Santiago Celma A new low-voltage CMOS gate-bootstrapped switch based on quasi-floating gate transistors B. Palomo, J.M. Garcia-Gonzalez, H. ElGmili, Fernando Muñoz, R.G Carvajal Session T2D. Failure Analysis & Reliability Room: Bridge Chairs: Mar Martínez, Miquel Roca High-Level Probabilistic Delay Fault Model for Arithmetic Circuits under Dynamic Voltage Scaling Ting Lei, Yihe Sun, Joan Figueras Improving the Stability of 6T Embedded SRAMs decreasing the Word-Line Voltage Bartomeu Alorda, Gabriel Torrens, Jaume Segura, Sebastià Bota Defective Behaviour of an 8T SRAM Cell with Open Defects Rosa Rodríguez-Montañés, Daniel Arumí, Salvador Manich, Joan Figueras 12.30 to 13.50 12.30 to 13.50 12.30 to 13.50 Thursday, November 18

09.00-09.30 Registration 09.30-10.50 Analog & Mixed Signal IC Design IV Hw-Sw Codesign 10.50-11.20 Coffee Break 11.20-12.20 Embedded Design & SoC III Wireless Applications Keynote Presentation ASIC and FPGA for Space Applications: technology and strategies to counteract radiation effects Agustín Fernández-León, European Space Agency (The Netherlands) 12.20-12-30 Break 12.30-13.50 Nanoelectronics Integrated Sensors & MEMS Programmable Systems & Reconfigurability 13.50-14.00 Concluding Remarks 14.00-15.30 Lunch RF IC Design IV Friday, November 19

Session F1A. Analog & Mixed Signal IC Design IV Room: Tagoror Chairs: Luz Balado, Francesc Serra-Graells A CMOS Programmable Differential V-to-F Converter with Temperature Drift Compensation Rodanas Valero, Santiago Celma, Belen Calvo, Nicolás Medrano, Cristina Azcona Regression Modeling for Digital Test of Sigma-Delta Modulators Gildas Leger, Adoración Rueda A Highly Linear Transconductor based on the Source-Degenerated CMOS Differential Pair Clara Lujan-Martinez, Antonio Torralba A low-voltage low-power CMOS analog Bio-Impedance Analyzer for implantable devices Jaime Punter, Jordi Colomer, Pere Miribel Session F1B. Hw-Sw Codesign Room: Teguise Chairs: Eugenio Villar, Gustavo M. Callicó 09.30 to 10.50 09.30 to 10.50 Automatic Generation of SystemC SMP Models for HW/SW Co-simulation Patricia Botella, Pablo Sanchez, Hector Posadas Obtaining Memory Address Traces from Native Co-Simulation for Data Cache Modeling in SystemC Luis Díaz, Hector Posadas, Eugenio Villar Embedded software execution time estimation at different abstraction levels Pablo González de Aledo, Pablo Sanchez, Luis Díaz Fast Prototyping of a Scanning Probe Microscopy Real-Time Controller using an Embedded Hardware/Software Co-design Platform Jorge Otero, Camilo Rojas, Manuel Puig-Vidal Session F1C. Embedded Design & SoC III Room: Presidente Chairs: Pablo Ituero, César Sanz Instruction Set Extensions to Reduce Latency in Soft-Core Clusters David Castells-Rufas, Jaume Joven, Sergi Risueño, Eduard Fernandez, Jordi Carrabina Hybridising NiC/NoC switching techniques Eduard Fernandez, David Castells-Rufas, Sergi Risueño, Jaume Joven A Test Bench for Performance Measurement of an OMAP3530-based Platform Fulgencio Diaz, Eduardo Juarez, Manuel César Rodríguez, Gonzalo Maturana, César Sanz Native Co-Simulation of TCP/IP-Based Embedded Systems in SystemC Hector Posadas, Eugenio Villar 09.30 to 10.50 Friday, November 19

Session F1D. Wireless Applications Room: Bridge Chairs: Carlos López Barrio, Ramón González Carvajal Wireless Sensor Network Application for Environmental Impact Analysis and Control Jorge Portilla, Juan Valverde, Teresa Riesgo Wireless Sensor Networks applied to home healthcare for dependent people Cristina Barnet, Jaime López, Manuel López, José Mª Gómez, Atilà Herms A ZigBee based Advanced Meter Infrastructure André Glória, Helena Sarmento A low cost wireless sensor for monitoring Patients with novel routing Algorithm Jon Mendizabal Samper, Paul Bustamante, Gonzalo Solas Keynote Presentation: ASIC and FPGA for Space Applications: technology and strategies to counteract radiation effects, Agustín Fernández-León, European Space Agency (The Netherlands) Session F2A. Nanoelectronics Room: Tagoror Chairs: Eugenio García, Antonio Hernández Silicon nanocrystal MOSLEDs as efficient Silicon integrated light emitters Blas Garrido, Mariano Perálvarez, Yonder Berencen, Olivier Jambois Design of boolean functions and memory units based on Resistive Switching Devices Carmen García, Francesc Moll, Antonio Rubio Simulation of Multiple-Gate SOI FETs in the nanometer range Andres Godoy, Francisco Garcia Ruiz, Isabel Tienda Luna, Luca Donetti, Carlos Sampedro, Francisco Gamiz 09.30 to 10.50 11.20 to 12.20 12.30 to 13.50 Friday, November 19

Session F2B. Integrated Sensors & MEMS Room: Teguise Chairs: Atilà Herms, Arantxa Uranga Endoleakage Monitoring Using Inductive-Coupling Alfredo Moreira, José Machado da Silva, Luís Rocha Design of an Efficient Interconnection Network of Temperature Sensors Pablo Ituero, Marisa López-Vallejo, Miguel A. Sánchez Marcos, Carlos Gómez Osuna A Fully Integrated Filter based on two Mechanical Coupled Lateral Microelectromechanical Resonators Joan Giner, Arantxa Uranga, Eloi Marigó, Jose Luis Muñoz, Francesc Torres, Nuria Barniol Floating Gate Based CMOS Dosimeter Eugenio García-Moreno, Roca Miquel, Eugeni Isern, Rodrigo Picos, Joan Font, Kay Suenaga Session F2C. Programmable Systems & Reconfigurability Room: Presidente Chairs: Sebastián López, Fernando Pescador Using FPGAs for Real-Time Disparity Map Calculation Carlos Resende, João Canas Ferreira IPP Watermarking-Based Protection of Embedded Cores over FPGAs Luis Parrilla, Encarnación Castillo, Antonio García, Elías Todorovich Tail recursion in Hardware Paulo Ferreira, João Canas Ferreira, José Carlos Alves Reconfigurable and Adaptive Routing Method with Fault Awareness for NoC Applications Mojtaba Valinataj, Siamak Mohammadi Session F2D. RF IC Design IV Room: Bridge Chairs: Santiago Celma, Unai Alvarado Area Reduction in RF Fully Integrated Front-Ends for Ultra-Wideband H. García-Vázquez, R. Díaz, D. Ramos-Valido, A. Santana-Peña, J. del Pino, Sunil L. Khemchandani Integrated PN Varactors and their Application in Wide Range VCOs Margarita Marrero-Martin, Benito González, Javier García, Sunil L. Khemchandani, Antonio Hernández, J. del Pino A 5 GHz LC-VCO with Active Common Mode Feedback Circuit in Sub-micrometer CMOS Technology Ricardo Doldán, Antonio Ginés, Adoración Rueda, Eduardo Peralías A 1.2V CMOS-90nm Gm-C Complex Filter with Frequency Tuning for Wireless Network Applications Alberto Villegas, Diego Vázquez, Adoración Rueda 12.30 to 13.50 12.30 to 13.50 12.30 to 13.50 Friday, November 19